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The following file could be using as a .ucf file template for any new application based on our Chameleon POD.
################################################################################
## Constraint: UCF file for CPLD on Chameleon POD (v1.4) ##
## Rel. prj.: Generic project of the Chameleon POD ##
## Device: XCR3128XL ##
## Package: VQ100 ##
## Authors: Laurent Gauch 16.04.2003 ##
## Company: Amontec ( http.//www.amontec.com ) ##
## Note: for EDIF netlist replace '<' by '(' and ')' by '>' ##
################################################################################
## ##
################################################################################
## PAD ATTRIBUTE OF D-SUB MALE CONNECTOR (COMPUTER SIDE / PARALLEL PORT)
################################################################################
NET spp_strobe_n_01 LOC = "P20" ; # pin no 01 of the D-Sub male connector
NET spp_data0_02 LOC = "P62" ; # pin no 02 of the D-Sub male connector
NET spp_data1_03 LOC = "P04" ; # pin no 03 of the D-Sub male connector
NET spp_data2_04 LOC = "P15" ; # pin no 04 of the D-Sub male connector
NET spp_data3_05 LOC = "P32" ; # pin no 05 of the D-Sub male connector
NET spp_data4_06 LOC = "P33" ; # pin no 06 of the D-Sub male connector
NET spp_data5_07 LOC = "P40" ; # pin no 07 of the D-Sub male connector
NET spp_data6_08 LOC = "P42" ; # pin no 08 of the D-Sub male connector
NET spp_data7_09 LOC = "P45" ; # pin no 09 of the D-Sub male connector
NET spp_ack_n_10 LOC = "P48" ; # pin no 10 of the D-Sub male connector
NET spp_busy_11 LOC = "P73" ; # pin no 11 of the D-Sub male connector
NET spp_paperend_12 LOC = "P52" ; # pin no 12 of the D-Sub male connector
NET spp_selectin_13 LOC = "P54" ; # pin no 13 of the D-Sub male connector
NET spp_autofd_n_14 LOC = "P21" ; # pin no 14 of the D-Sub male connector
NET spp_error_n_15 LOC = "P23" ; # pin no 15 of the D-Sub male connector
NET spp_init_n_16 LOC = "P25" ; # pin no 16 of the D-Sub male connector
NET spp_select_n_17 LOC = "P29" ; # pin no 17 of the D-Sub male connector
################################################################################
## PAD ATTRIBUTE OF D-SUB FEMALE CONNECTOR (USER SIDE)
################################################################################
## read the note 1 for gio_01 and gio_13
## NET gio_01 LOC = "P10" ; # pin no 01 of the D-Sub female connector
NET gio_02 LOC = "P99" ; # pin no 02 of the D-Sub female connector
NET gio_03 LOC = "P97" ; # pin no 03 of the D-Sub female connector
NET gio_04 LOC = "P93" ; # pin no 04 of the D-Sub female connector
NET gio_05 LOC = "P92" ; # pin no 05 of the D-Sub female connector
NET gio_06 LOC = "P84" ; # pin no 06 of the D-Sub female connector
NET gio_07 LOC = "P83" ; # pin no 07 of the D-Sub female connector
NET gio_08 LOC = "P81" ; # pin no 08 of the D-Sub female connector
NET gio_09 LOC = "P80" ; # pin no 09 of the D-Sub female connector
NET gio_10 LOC = "P79" ; # pin no 10 of the D-Sub female connector
NET gio_11 LOC = "P75" ; # pin no 11 of the D-Sub female connector
NET gio_12 LOC = "P71" ; # pin no 12 of the D-Sub female connector
## read the note 1 for gio_01 and gio_13
## NET gio_13 LOC = "P68" ; # pin no 13 of the D-Sub female connector
NET gio_14 LOC = "P100"; # pin no 14 of the D-Sub female connector
NET gio_15 LOC = "P98" ; # pin no 15 of the D-Sub female connector
NET gio_16 LOC = "P96" ; # pin no 16 of the D-Sub female connector
NET gio_17 LOC = "P94" ; # pin no 17 of the D-Sub female connector
## NOTE 1 for gio_01 and gio_13
## onboard SMD jumper allow to give different functions to the pin no 01
## and pin no 13 of the D-SUB female connector (user side).
## by default, these jumper drive the power input and output to and from
## the chameleon:
## SMD jumper JP1 as vcc 3.3V input (or gio_01)
## SMD jumper JP2 as vcc 3.3V output (or gio_013)
################################################################################
## PAD ATTRIBUTE CLOCK PINS
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NET clk LOC = "P90" ; # IN: onboard 32MHz Quartz Crystal
NET clk1_in LOC = "P89" ; # IN: onboard driven by clk1_out
NET clk1_out LOC = "P64" ; # OUT: onboard connected to clk1_in
NET clk2_in LOC = "P88" ; # IN: onboard driven by clk1_out
NET clk2_out LOC = "P65" ; # OUT: onboard connected to clk1_in
NET clk3_in LOC = "P87" ; # IN: onboard driven by clk1_out
NET clk3_out LOC = "P85" ; # OUT: onboard connected to clk1_in
################################################################################
## PAD ATTRIBUTE OF 1284 CONTROL
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NET pp_oe_n LOC = "P41" ; # OUT: By default '1', used in EPP and ECP Modes
NET pp_totem LOC = "P57" ; # OUT: By default '1', used in EPP and ECP Modes
################################################################################
## PAD ATTRIBUTE OF SUPPLEMENTARY PINS (CONTROL, STATUS)
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NET switch_status LOC = "P13" ; # IN: status of the onboard switch (reset)
NET user_led LOC = "P69" ; # OUT: onboard red LED
NET jtag_port_ctrl LOC = "P06" ; # OPD: 'Z' enabling JTAG , '0' desabling JTAG
NET jtag_port_status LOC = "P12" ; # IN: '1'=JTAG enabled, '0'=JTAG disabled
## NOTE : In normal use, the port_ctrl need to be driven by a low level logic.
## port_ctrl signal has an onboard pull-up resistor.
################################################################################
## PULLUP DESCRIPTION (IF NEEDED)
################################################################################
## NET your_netname PULLUP;
## ##
## END OF .UCF ##
################################################################################
Download the file in a test format here.
The .ucf Files are used when doing the Place and Route of your custom application via the Xilinx ISE tool chain (Webpack).
The webpack is a Free software provided by Xilinx for developing any CPLD applications. Please see Xilinx website for downloading the last version of the Webpack ISE.
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